TOOLS OF XCELLENCE
GateRocket Drive Speeds Verification of Virtex-5 FPGAs 4x to 10x
With a mission to help “ASIC refugees” speed the verification
and debug of ever-more-complex system-on-chip (SoC) designs
they’re implementing on FPGAs, EDA tool startup GateRocket
has released a Xilinx Virtex-5 version of its RocketDrive “native
device” verification and debug environment. Using it, engineers
can test the behavior of a design running on actual FPGA
silicon while still in their HDL verification and debug environment
of choice.
GateRocket’s RocketDrive lets you test the behavior of your design running on actual FPGA
silicon while still in your HDL verification and debug environment of choice.
Traditionally, hardware-assisted verification and emulation
systems have targeted ASIC designs, but Dave Orecchio,
GateRocket’s president and CEO, said that today’s FPGAs have
advanced to the point where designers can now truly implement
SoC designs on a single FPGA. “It used to be that for many applications
you had no choice but to design an ASIC,” Orecchio said.
“Today designers have a choice, and increasingly they are designing
with FPGAs.”
Orecchio described RocketDrive as “the first hardware-assisted
verification and debug environment specifically targeting these
complex FPGA design projects—we’re here to help ASIC refugees.”
GateRocket’s offering has a hardware and a software component.
The hardware is a drive that fits into any 5.25-inch drive
slot in a PC chassis, while the RocketVision software coordinates
verification and debug, connecting the drive to Xilinx ISE ® and
third-party vendor tools of the user’s choice.
Customers select which model of drive they need for their
designs based on which Virtex-5 device they plan to use. That is
64 Xcell Journal First Quarter 2009
because the RocketDrive itself contains an FPGA from the largest
platforms in the Virtex-5 family. One model packs a Virtex-5
LX330T, another the Virtex-5 SX240T and a third, the Virtex-5
FX200T device. Orecchio said this native-device approach, among
other things, eliminates the nagging question that haunts users of
traditional logic emulation systems: is the cause of a given bug
really a problem with the design under test or is it due to a flaw in
the emulation system running the design?
RocketDrive claims to speed verification 4x to 10x over software-based
simulation. The larger the design, the greater the
speedup, Orecchio said. In addition, he went on, because the
drive is device-native, it can help users quickly find the root causes
of functional errors in their HDL code. Designers can select
which blocks they want to run on the drive and those they want
to run on the simulator.
Customers can also use the drive to validate a model of an IP
block against the IP actually running on silicon, or to validate
that they have selected an optimal pin placement during the early
stages of design. RocketDrive also helps users figure out if they
have any tool chain faults.
“You can use the RocketDrive at every phase of the design,
from RTL creation all the way through onboard test,” said
Orecchio.
The RocketDrive sells for $45,000, while the RocketVision software
is priced at $9,500. You can learn more about GateRocket and
even sign up for a free Webinar at www.gaterocket.com.
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