SEMICONDUCTOR TECHNOLOGY
develop so-called quantum well
transistors. It is thought that such
devices, which confine the movement of
particles to two dimensions, could
effectively help neutralise the strange
quantum phenomena that will occur as
transistors shrink further.
Knupffer added that Intel researchers
are also excited at the possibilities
offered by ‘silicon photonics’, a
technology that could replace wires with
a tiny silicon version of fibreoptics.
‘Currently data travels on a processor
and in between processors using copper
wires. Fibreoptic communications is
currently only used for big, long-distance
applications but we’re looking at making
it a chip-to-chip product.’
Engineers working on this project
have already developed a range of
devices, including a hybrid silicon laser,
light guides (waveguides in silicon that
can direct light, as in an optical fibre),
and silicon modulators that can
encourage light into stops and starts.
‘We’ve got all we need to create silicon
photonic interconnects between chips on
the motherboard,’ said Knupffer,
who believes the technique could
revolutionise the way devices are made.
‘On a motherboard you have the RAM
right next to the processors, because
copper tracers can’t be too far away, but
that issue doesn’t exist with light. You
could have all your memory in a different
rack or part of the building, and this
The Raman laser
is based on Intel’s
silicon photonics
technology, left,
and IBM’s
approach to
cooling is to use
microscopic rivers
of water
could have a massive impact on server
design.’ Intel is developing the technol-
ogy into a product that should emerge
in the next 12 months, he added.
Intel is not the only company in the
chip-shrinking business. Earlier this
year, IBM also announced the develop-
ment of a 45nm high-k metal gate chip
and, like Intel, is investigating other
methods of keeping Moore’s Law afloat.
One technology thought to hold
promise for near-term improvements is
the development of 3D chips that enable
‘Our brains make mistakes but we get most of
it right — despite the fact that our underlying
mechanisms are unreliable’ Prof Erol Gelenbe, Imperial
transistors to be packed more tightly
together. IBM is working on the
development of 3D stacking technology,
which replaces traditional metal wires
with so-called ‘through-silicon vias’,
vertical connections etched through
the silicon wafer and filled with metal.
It allows chips and memory devices
that traditionally sit side by side on a
silicon wafer to be stacked on top of one
another, reducing the size of the chip
package and boosting the speed at
which data flows among the functions
on the chip.
IBM claims the technique reduces
the distance that information on a chip
travels by a factor of 1,000. The
company is running chips using
technology in its manufacturing line,
and plans to enter production with
them this year.
Initial applications are expected to
be in wireless communications chips,
although IBM is also reported to be
converting the chip that powers its
Blue Gene supercomputer into a 3D
stacked chip.
This approach is not without its
problems, however. Stacking chips on
top of each other makes it harder to get
the heat out. So in parallel with its
stacking project, IBM has joined
researchers at Germany’s Fraunhofer
Institute to develop a cooling technique
that uses a network of 50-micron pipes
to circulate rivers of water between
each layer in the stack.
It is all highly impressive, but as
Imperial’s Gelenbe explained, it is
designed to eke out a core technology
that is approaching a more fundamen-
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