XTRA, XTRA
Xilinx Tool & IP Updates
Xilinx is continually improving its products, IP and design tools as it strives to
help designers work more effectively. Here we report on the most current updates
to the flagship FPGA development environment, the ISE ® Design Suite, as well as
to Xilinx IP, as of September 2009. Also, look for new tools, IP and development
boards from Xilinx partners in the Tools of Xcellence section of this issue.
Product updates offer significant enhancements and new features to three versions
of the ISE Design Suite: the Logic, Embedded and DSP editions. Keeping your
installation of ISE up to date is an easy way to ensure the best results for your
design. Updates to the ISE Design Suite are available from the Xilinx Download
Center at www.xilinx.com/download. For more information or to download a
free 30-day evaluation of ISE, visit www.xilinx.com/ise.
ISE Design Suite: Logic Edition
Ultimate productivity for FPGA logic design
Latest version number: 11.3
Date of latest release: September 2009
Previous release: 11.2
URL to download the latest patch:
www.xilinx.com/download
Revision highlights:
This latest release of the ISE Design
Suite: Logic Edition supports the new
Virtex ® -6 HXT FPGA platform. The
Virtex-6 family of devices delivers the
industry’s highest-bandwidth FPGA with
up to 72 serial transceivers for applications
such as bridging, switching and
aggregation in wired telecommunications
and data communications systems.
ChipScope™ Pro: The Integrated Bit Error
Ratio Tester (IBERT) 2.0 now supports the
Spartan ® -6 LXT FPGA family.
iMPACT: Reading and programming of
eFUSE registers is now supported for
devices in the Spartan-6 family, and eFUSE
support has been extended to the Linux
operating system in addition to the 32-bit
version of Microsoft Windows.
ISE Simulator (ISim): File names in the ISim
console now link to the associated file. Also,
ISim users now have the ability to clear the
console for greater ease of use.
PlanAhead™ design analysis tool: PlanAhead
now supports the creation of DCI Cascade
groups and membership editing. A new
SSN Predictor is available when targeting
Virtex-6 FPGAs. In addition, new
PlanAhead interface enhancements allow
users to label pin rows in the package view
when zooming. Additional DRCs are available
for designs targeting Virtex-6 and
Spartan-6 FPGAs.
Xilinx Power Analyzer (XPA): The Xilinx
Power Analyzer provides greater ease of use
with new capabilities to interrupt the power
analysis process, support for bus reconstruction
in the I/O view and the ability to select
and edit multiple cells within the interface.
ISE Design Suite:
Embedded Edition
An integrated software solution for designing
embedded processing systems
Latest version number: 11.3
Date of latest release: September 2009
Previous release: 11.2
URL to download the latest patch:
www.xilinx.com/download
Revision highlights:
All ISE Design Suite editions include the
enhancements listed above for the Logic
Edition. The following enhancements are
specific to the Embedded Edition.
Xilinx Platform Studio (XPS) and the Embedded
Development Kit (EDK): For command line
users, Platform Flash XL is now supported,
as is contract-based IP licensing. XPS has
added Clock Generator support for Virtex-
6 and Spartan-6 FPGA families as well as
Clock Wizard support for the Multi-port
Memory Controller (MPMC) for the
Virtex-6 and Spartan-6.
ISE Design Suite: DSP Edition
Flows and IP tailored to the needs of algorithm,
system and hardware developers
Latest version number: 11.3
Date of latest release: September 2009
Previous release: 11.2
URL to download the latest patch:
www.xilinx.com/download
Revision highlights:
All ISE Design Suite editions include the
enhancements listed above for the Logic
Edition. The following enhancements are
specific to the DSP Edition.
Support for the Virtex-6 HXT FPGA platform:
This latest release of the ISE Design Suite
supports the new Virtex-6 HXT FPGA platform,
delivering the industry’s highest-bandwidth
FPGA with up to 72 serial
transceivers for applications such as bridging,
switching and aggregation in wired
telecommunications and data communications
systems.
System Generator for DSP: This tool now
supports the following new devices: Virtex-
6 FPGA Lower Power (Virtex-6-1L),
Virtex-6 HXT FPGA and Virtex-5Q
FPGA. System Generator for DSP also provides
support for JTAG hardware co-simulation
for the Spartan-6 FPGA SP605
Development Platform.
New operating system support: System
Generator for DSP has expanded its OS
support to include Microsoft Windows
Vista Business 32-bit (English), Red Hat
54 Xcell Journal Fourth Quarter 2009
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