demonstrate the increasing value of the
splayed-pin fin design at lower airspeeds.
Experiment 2: Cooling Multiple FPGAs
Boards that contain a large number of
devices present much more complex cooling
challenges than those equipped with a single
FPGA. That’s because the multidevice situations
require that surrounding airflows be
shared among the devices on the board.
When cooling multiple “hot” FPGAs, design
engineers must consider not only the thermal
resistance of the heat sink but also the
pressure drop of each heat sink. The lower
the pressure drop, the more air will be available
for cooling devices that are positioned
downstream from the air source.
Splayed-pin fins feature a lower pressure
drop than vertically constructed heat sinks,
as there is more space for the air to enter and
exit the pin array. To illustrate the dual
advantage (lower pressure drop and added
cooling) of splayed-pin fins in multi-FPGA
environments, we constructed a simple
experiment that involved putting three heat
sinks on identical FPGAs placed in a row
behind a fan. The fan pushed a given airflow
and then we took the temperature measurements
needed to determine heat sink thermal
resistance. Each FPGA dissipated 30 W.
We ran the experiment twice, once with
three traditional pin fins and then again with
three splayed-pin fins. The heat sinks we
used measured 2.05 x 2.05 inches x 1.1 inch
tall, and the fan was blowing 400 LFM in a
free-air environment.
The results of this experiment demonstrate
that the switch to splayed-pin fins on a
board with multiple heat sinks pays a huge
dividend. The experiment showed a 26 to 29
percent reduction in thermal resistance for
the second and third devices with the splayed
heat sinks. This performance premium is a
product of the lower thermal resistance of the
heat sink and its lower pressure drop.
Looking Forward
As heat loads dissipated by cutting-edge
FPGAs continue to escalate, designers will
require even greater cooling performance
from their heat sinks. In some cases, a passive
heat sink by itself will be insufficient and
designers will be forced to adopt active heat
sink solutions such as fan sinks, which
mount a fan directly on the heat sink. In
time, we can expect thermal-management
vendors to offer more and more fan sink
solutions.
One example of a new, high-performance
fan sink solution is an integrated model that
embeds a fan within a very efficient pin fin
heat sink (Figure 3). Taking advantage of the
added turbulence caused by the round pins
and the large surface area achieved by the pin
array, this integrated fan sink attains outstanding
cooling performance in a very lowprofile
package that can fit into ATCA and
PCI Express applications.
Until the fan sink comes into widespread
commercial use, however, designers will gain
an edge by using the splayed-pin fin heat
sink in their FPGA-based designs.
Figure 3 – Integrated copper fan sink, the next step in cooling
XPLANATION:FPGA101
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